Remove crap

Simulations/VCA/Draft1.asc

@@ -1,4 +0,0 @@
-Version 4
-SHEET 1 880 680
-SYMBOL res 48 112 R0
-SYMATTR InstName R1

Simulations/VCA/J-fet attenuator.asc

@@ -1,37 +0,0 @@
-Version 4
-SHEET 1 1524 680
-WIRE 1296 192 1296 -64
-WIRE 352 208 352 192
-WIRE 352 208 224 208
-WIRE 224 224 224 208
-WIRE 352 240 352 208
-WIRE 1248 256 1056 256
-WIRE 1296 432 1296 288
-WIRE 1056 560 1056 256
-WIRE 1296 560 1296 512
-WIRE 1296 560 1056 560
-WIRE 1296 624 1296 560
-FLAG 224 224 0
-FLAG 352 320 Vee
-FLAG 352 112 Vcc
-FLAG 1296 624 0
-FLAG 1296 -64 Vcc
-SYMBOL voltage 352 96 R0
-WINDOW 123 0 0 Left 2
-WINDOW 39 0 0 Left 2
-SYMATTR InstName V2
-SYMATTR Value 12
-SYMBOL voltage 352 224 R0
-WINDOW 123 0 0 Left 2
-WINDOW 39 0 0 Left 2
-SYMATTR InstName V3
-SYMATTR Value 12
-SYMBOL njf 1248 192 R0
-SYMATTR InstName J1
-SYMATTR Value J113
-SYMBOL res 1280 416 R0
-SYMATTR InstName R1
-SYMATTR Value 1Meg
-TEXT -72 568 Left 2 !.tran 1
-TEXT -112 424 Left 2 !;.step temp list -40 25 85
-TEXT -24 496 Left 2 !;.step param Vgs 0 -5 -.5

Simulations/VCA/SSI2161.asy

@@ -21,7 +21,7 @@ WINDOW 0 -33 -57 Bottom 2
 WINDOW 3 8 49 Top 2
 SYMATTR Value SII2161_ideal
 SYMATTR Prefix X
-SYMATTR ModelFile J:\Users\Jonatan\Documents\LTspiceXVII\project\synth grejjer\VCA\2164-models.lib
+SYMATTR ModelFile 2164-models.lib
 PIN -80 0 NONE 8
 PINATTR PinName iin
 PINATTR SpiceOrder 1

Simulations/VCA/test_subscheet.asc

@@ -1,2 +0,0 @@
-Version 4
-SHEET 1 880 680