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Fix 2164 model not being able to be AC analyzed properly. Add 0V voltage to measure current through instead.

Jonatan Gezelius 2 anni fa
parent
commit
f44b626447

+ 4 - 3
Simulations/VCA/2164-models.lib

@@ -1,10 +1,11 @@
 .subckt SII2161_ideal iin vc iout
-*V1 iin 0 0
-R1 iin 0 1p
+R1 iin n1 1n
+V1 n1 0 0
 R2 vc 0 10k
 
 * Create output current based on the input current and the control voltage
-B1 iout 0 I=limit(-I(R1), -1m, 1m)*2**(-5.0505*V(vc))
+B1 0 iout I=limit(I(V1), -1m, 1m)*2**(-5.0505*V(vc))
+;B1 0 iout I=I(V1)*2**(-5.0505*V(vc))
 
 * Limit output voltage with a specialized diode
 D1 iout 0 clamp_diode

+ 0 - 75
Simulations/VCA/2164-sim.asc

@@ -1,75 +0,0 @@
-Version 4
-SHEET 1 1176 680
-WIRE -752 -240 -752 -256
-WIRE -752 -240 -816 -240
-WIRE -816 -224 -816 -240
-WIRE -752 -224 -752 -240
-WIRE 304 -208 304 -384
-WIRE 304 -208 272 -208
-WIRE 336 -208 304 -208
-WIRE 144 -112 -336 -112
-WIRE 272 -64 272 -112
-WIRE 272 -64 208 -64
-WIRE 336 -64 336 -112
-WIRE 400 -64 336 -64
-WIRE -336 -48 -336 -112
-WIRE -336 48 -336 16
-WIRE 208 96 208 -64
-WIRE 304 96 208 96
-WIRE 400 96 400 -64
-WIRE 304 144 304 96
-WIRE 304 144 272 144
-WIRE 336 144 304 144
-WIRE -336 160 -336 128
-WIRE 208 224 208 192
-WIRE 400 224 400 192
-WIRE 400 224 208 224
-WIRE 560 224 400 224
-FLAG -336 160 0
-FLAG -816 -224 0
-FLAG -752 -336 V+
-FLAG -752 -144 V-
-SYMBOL npn 336 96 R0
-SYMATTR InstName Q1
-SYMATTR Value 2N2222
-SYMBOL pnp 144 -64 M180
-WINDOW 0 35 43 Left 2
-WINDOW 3 -101 77 Left 2
-SYMATTR InstName Q2
-SYMATTR Value 2N2907
-SYMBOL Opamps\\LT1056 1072 -80 R0
-SYMATTR InstName U1
-SYMBOL diode 752 0 R0
-SYMATTR InstName D1
-SYMBOL pnp 208 -112 M180
-WINDOW 0 41 53 Left 2
-WINDOW 3 -112 72 Left 2
-SYMATTR InstName Q3
-SYMATTR Value 2N2907
-SYMBOL pnp 464 -64 R180
-WINDOW 0 35 43 Left 2
-WINDOW 3 -101 77 Left 2
-SYMATTR InstName Q4
-SYMATTR Value 2N2907
-SYMBOL pnp 400 -112 R180
-WINDOW 0 41 53 Left 2
-WINDOW 3 -112 72 Left 2
-SYMATTR InstName Q5
-SYMATTR Value 2N2907
-SYMBOL res -352 32 R0
-SYMATTR InstName R1
-SYMATTR Value 500
-SYMBOL cap -352 -48 R0
-SYMATTR InstName C1
-SYMATTR Value 500p
-SYMBOL npn 272 96 M0
-SYMATTR InstName Q6
-SYMATTR Value 2N2222
-SYMBOL voltage -752 -352 R0
-SYMATTR InstName V1
-SYMATTR Value 15
-SYMBOL voltage -752 -240 R0
-WINDOW 123 0 0 Left 0
-WINDOW 39 0 0 Left 0
-SYMATTR InstName V2
-SYMATTR Value 15

+ 9 - 15
Simulations/VCA/2164-simple-model.asc

@@ -2,29 +2,21 @@ Version 4
 SHEET 1 1780 860
 WIRE 736 -96 560 -96
 WIRE 560 -32 560 -96
-WIRE -288 112 -288 96
-WIRE -288 112 -320 112
-WIRE -320 128 -320 112
-WIRE -288 128 -288 112
+WIRE 1360 112 1264 112
+WIRE 1392 112 1360 112
 WIRE 736 144 736 -96
 WIRE 640 192 592 192
 WIRE 944 192 832 192
 WIRE 992 192 944 192
 WIRE 992 224 992 192
+WIRE 1264 224 1264 112
 WIRE 592 240 592 192
-FLAG -320 128 0
-FLAG -288 16 V+
-FLAG -288 208 V-
 FLAG 592 320 0
 FLAG 560 48 0
 FLAG 992 304 0
 FLAG 944 192 Vout
-SYMBOL voltage -288 0 R0
-SYMATTR InstName V1
-SYMATTR Value 12
-SYMBOL voltage -288 112 R0
-SYMATTR InstName V2
-SYMATTR Value 12
+FLAG 1264 304 0
+FLAG 1360 112 Vwave
 SYMBOL current 592 320 R180
 WINDOW 0 24 80 Left 2
 WINDOW 3 24 0 Left 2
@@ -43,7 +35,9 @@ SYMATTR InstName R3
 SYMATTR Value 1
 SYMBOL SSI2161 720 192 R0
 SYMATTR InstName U1
-TEXT -212 -120 Left 2 !;.tran 1
+SYMBOL bv 1264 208 R0
+SYMATTR InstName B1
+SYMATTR Value V=V(Vout)*1000
 TEXT -216 -200 Left 2 !.step param vcin list 0 33m 66m 99m 3.3 -.099
-TEXT -198 -96 Left 2 !.ac dec 100 1 1G
+TEXT -200 -96 Left 2 !.ac dec 100 1 1G\n;.tran 1
 TEXT -216 -232 Left 2 !.include 2164-models.lib

+ 4 - 4
Simulations/VCA/Vc-summing.asc

@@ -33,17 +33,15 @@ FLAG -960 -144 V+
 FLAG -960 80 V-
 FLAG 320 592 0
 FLAG 432 800 RightAtt
-SYMBOL SSI2161 240 144 R0
-SYMATTR InstName U1
 SYMBOL voltage 624 160 R0
 SYMATTR InstName V1
 SYMATTR Value 0
 SYMBOL voltage -592 160 R0
 WINDOW 123 24 124 Left 2
 WINDOW 39 0 0 Left 0
+SYMATTR Value2 AC 5
 SYMATTR InstName V2
 SYMATTR Value SINE(0 5 5 0)
-SYMATTR Value2 AC 5
 SYMBOL res -128 160 R270
 WINDOW 0 32 56 VTop 2
 WINDOW 3 0 56 VBottom 2
@@ -66,4 +64,6 @@ SYMATTR Value 100
 SYMBOL pmos 144 672 M180
 SYMATTR InstName M1
 SYMATTR Value BSS84
-TEXT -386 -296 Left 2 !.tran 1
+SYMBOL SSI2161 240 144 R0
+SYMATTR InstName U1
+TEXT -384 -296 Left 2 !.tran 1

+ 2 - 2
Simulations/VCA/audio-tests.asc

@@ -44,14 +44,14 @@ WINDOW 0 0 56 VBottom 2
 WINDOW 3 32 56 VTop 2
 SYMATTR InstName R2
 SYMATTR Value 1k
-SYMBOL SSI2161 80 -32 R0
-SYMATTR InstName U1
 SYMBOL voltage -96 -272 R0
 SYMATTR InstName V4
 SYMATTR Value {Vc}
 SYMBOL bv 928 128 R0
 SYMATTR InstName B1
 SYMATTR Value V=V(Vout)*1000
+SYMBOL SSI2161 80 -32 R0
+SYMATTR InstName U1
 TEXT -560 408 Left 2 !.tran 5
 TEXT -760 -376 Left 2 !.param vc 0\n.step param vc list -.099 0 0.099 .99
 TEXT 672 -280 Left 2 !.wave "out_{vc}.wav" 16 44.1k V(Vwave)

+ 2 - 2
Simulations/VCA/audio-tests2.asc

@@ -46,14 +46,14 @@ WINDOW 0 0 56 VBottom 2
 WINDOW 3 32 56 VTop 2
 SYMATTR InstName R2
 SYMATTR Value 1k
-SYMBOL SSI2161 80 -32 R0
-SYMATTR InstName U1
 SYMBOL voltage -96 -272 R0
 SYMATTR InstName V4
 SYMATTR Value {Vc}
 SYMBOL bv 928 128 R0
 SYMATTR InstName B1
 SYMATTR Value V=V(Vout)*1000
+SYMBOL SSI2161 80 -32 R0
+SYMATTR InstName U1
 TEXT -744 -296 Left 2 !.tran 1
 TEXT -760 -376 Left 2 !.param vc 1.98\n;.step param vc list 1.584
 TEXT 672 -280 Left 2 !.wave "out_{vc}.wav" 16 44.1k V(Vwave)