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learning_ghdl
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learning_ghdl
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uart_module
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hdl_design
Jonatan Gezelius 2462a7191b Continue with async tx %!s(int64=4) %!d(string=hai) anos
..
async_8n1_tx.vhd 2462a7191b Continue with async tx %!s(int64=4) %!d(string=hai) anos
generic_counter.vhd 3d076c113b Begin uart project %!s(int64=4) %!d(string=hai) anos
generic_prescaler.vhd a172acb121 Remove output synchronisation from generic prescaler %!s(int64=4) %!d(string=hai) anos
ha.vhd 3d076c113b Begin uart project %!s(int64=4) %!d(string=hai) anos