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learning_ghdl
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uart_module
Jonatan Gezelius 2462a7191b Continue with async tx %!s(int64=4) %!d(string=hai) anos
..
hdl_design 2462a7191b Continue with async tx %!s(int64=4) %!d(string=hai) anos
simulation 3d076c113b Begin uart project %!s(int64=4) %!d(string=hai) anos
testbench 2462a7191b Continue with async tx %!s(int64=4) %!d(string=hai) anos
Makefile 2462a7191b Continue with async tx %!s(int64=4) %!d(string=hai) anos