utedass/learning_ghdl @ 478128add2f6b3844241070a02a9fe71f865ce46

Jonatan Gezelius 478128add2 Update counter test bench to contain automated testing and nicer clock		vor 4 Jahren
..
hdl_design	a172acb121 Remove output synchronisation from generic prescaler	vor 4 Jahren
simulation	3d076c113b Begin uart project	vor 4 Jahren
testbench	478128add2 Update counter test bench to contain automated testing and nicer clock	vor 4 Jahren
Makefile	550cf3b275 generic prescaler seems to be working as desired.	vor 4 Jahren