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learning_ghdl
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uart_module
Jonatan Gezelius 478128add2 Update counter test bench to contain automated testing and nicer clock il y a 4 ans
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hdl_design a172acb121 Remove output synchronisation from generic prescaler il y a 4 ans
simulation 3d076c113b Begin uart project il y a 4 ans
testbench 478128add2 Update counter test bench to contain automated testing and nicer clock il y a 4 ans
Makefile 550cf3b275 generic prescaler seems to be working as desired. il y a 4 ans